ST STM32F405 Reference Manual page 1392

USB on-the-go high-speed (OTG_HS)
SRP host mode program model is described in detail in
protocol.
35.6.2 USB host states
Host port power
On-chip 5 V V
switch (if a 5 V supply voltage is available on the application board) must be added
externally to drive the 5 V V
output. When the application powers on V
the port power bit in the host port control and status register (PPWR bit in OTG_HS_HPRT).
V valid
BUS
When SRP or HNP is enabled the VBUS sensing pin (PB13) pin should be connected to
V . The V
BUS
during USB operations. Any unforeseen V
(4.25 V) generates an OTG interrupt triggered by the session end detected bit (SEDET bit in
OTG_HS_GOTGINT). The application must then switch the V
port power bit.
When HNP and SRP are both disabled, the VBUS sensing pin (PB13) should not be
connected to V
The charge pump overcurrent flag can also be used to prevent electrical damage. Connect
the overcurrent flag output from the charge pump to any GPIO input, and configure it to
generate a port interrupt on the active level. The overcurrent ISR must promptly disable the
V generation and clear the port power bit.
BUS
Detection of peripheral connection by the host
If SRP or HNP are enabled, even if USB peripherals or B-devices can be attached at any
time, the OTG_HS does not detect a bus connection until the end of the V
(V over 4.75 V).
BUS
When V
BUS
host port interrupt triggered by the device connected bit in the host port control and status
register (PCDET bit in OTG_HS_HPRT).
When HNP and SRP are both disabled
soon as they are connected.
the device connected bit in the host port control and status (PCDET bit in OTG_FS_HPRT).
Detection of peripheral disconnection by the host
The peripheral disconnection event triggers the disconnect detected interrupt (DISCINT bit
in OTG_HS_GINTSTS).
Host enumeration
After detecting a peripheral connection, the host must start the enumeration process by
issuing an USB reset and configuration commands to the new peripheral.
Before sending an USB reset, the application waits for the OTG interrupt triggered by the
debounce done bit (DBCDNE bit in OTG_HS_GOTGINT), which indicates that the bus is
1392/1749
generation is not supported. As a result, a charge pump or a basic power
BUS
line. The external charge pump can be driven by any GPIO
BUS
input ensures that valid V
BUS
. This pin can be can be used as GPIO.
BUS
is at a valid level and a remote B-device is attached, the OTG_HS core issues a
The OTG_FS core issues a host port interrupt triggered by
RM0090 Rev 18
Section : A-device session request
through the selected GPIO, it must also set
BUS
levels are supplied by the charge pump
BUS
voltage drop below the V
BUS
, USB peripherals or B-device are detected as
RM0090
valid threshold
BUS
power off and clear the
BUS
sensing
BUS