Table 247. Lpuart Register Map And Reset Values - ST STM32L4 5 Series Reference Manual

RM0351
41.7.10 LPUART register map
The table below gives the
Offset Register
LPUART_
CR1
0x00
Reset value
LPUART_
CR2
0x04
Reset value 0
LPUART_
CR3
0x08
Reset value
LPUART_
BRR
0x0C
Reset value
0x10-
0x14
LPUART_
RQR
0x18
Reset value
LPUART_ISR
0x1C
Reset value
LPUART_ICR
0x20
Reset value
LPUART_
RDR
0x24
Reset value
LPUART_
TDR
0x28
Reset value
Refer to
Low-power universal asynchronous receiver transmitter (LPUART)
LPUART

Table 247. LPUART register map and reset values

0 0 0 0
ADD[7:4] ADD[3:0]
0 0 0 0 0 0 0
0
Section 2.2 on page 72
register map and reset values.
0 0 0 0 0 0 0
0 0 0 0 0
WUS
[1:0]
0 0 0 0
Reserved
0 0 0 0 0 0 0
0 0
for the register boundary addresses.
DocID024597 Rev 5
0 0 0 0 0 0 0 0
STOP
[1:0]
0 0
0 0 0 0 0 0 0
BRR[19:0]
0 0 0 0 0 0 0 0
0 0 1
0
X X X X X X
X X X X X X
0 0 0 0 0 0 0
0
0 0 0
0 0 0 0 0 0 0
0 0 0
1 0 0 0 0 0 0
0 0 0 0 0
RDR[8:0]
X X X
TDR[8:0]
X X X
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