T16B Ch.n Compare/Capture M Data Register - Epson S1C17M20 Technical Manual

Cmos 16-bit single chip microcontroller
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15 16-BIT PWM TIMERS (T16B)
T16BnCCCTLm.
TOUTMD[2:0]
T16BnCCCTLm.
bits
TOUTMT bit
Toggle mode
0x4
0
1
Set/reset mode
0x3
0
1
0x2
Toggle/reset mode
0
1
Set mode
0x1
0
1
Software control mode
0x0
*
Bit 1
TOUTINV
This bit selects the TOUTnm signal polarity.
1 (R/W): Inverted (active low)
0 (R/W): Normal (active high)
The T16BnCCCTLm.TOUTINV bit is control bit for comparator mode and is ineffective in capture
mode.
Bit 0
CCMD
This bit selects the operating mode of the comparator/capture circuit m.
1 (R/W): Capture mode (T16BnCCRm register = capture register)
0 (R/W): Comparator mode (T16BnCCRm register = compare data register)

T16B Ch.n Compare/Capture m Data Register

Register name
Bit
T16BnCCRm
15–0 CC[15:0]
Bits 15–0 CC[15:0]
In comparator mode, this register is configured as the compare data register and used to set the com-
parison value to be compared with the counter value.
In capture mode, this register is configured as the capture register and the counter value captured by
the capture trigger signal is loaded.
15-30
TOUT generation mode and operations
Output
Count mode
signal
All count modes
TOUTnm
All count modes
TOUTnm
TOUTnm+1 The signal is inverted by the MATCHm+1 or MATCHm signal.
Up count mode
TOUTnm
Up/down count mode
Down count mode
TOUTnm
All count modes
TOUTnm
TOUTnm+1 The signal becomes active by the MATCHm+1 signal and it
Up count mode
TOUTnm
Up/down count mode
Down count mode
TOUTnm
All count modes
TOUTnm
TOUTnm+1 The signal is inverted by the MATCHm+1 signal and it be-
All count modes
TOUTnm
All count modes
TOUTnm
TOUTnm+1 The signal becomes active by the MATCHm+1 or MATCHm
All count modes
TOUTnm
Bit name
Initial
0x0000
Seiko Epson Corporation
Change in the signal
The signal is inverted by the MATCH signal.
The signal is inverted by the MATCHm or MATCHm+1 signal.
The signal becomes active by the MATCH signal and it be-
comes inactive by the MAX signal.
The signal becomes active by the MATCH signal and it be-
comes inactive by the ZERO signal.
The signal becomes active by the MATCHm signal and it
becomes inactive by the MATCHm+1 signal.
becomes inactive by the MATCHm signal.
The signal is inverted by the MATCH signal and it becomes
inactive by the MAX signal.
The signal is inverted by the MATCH signal and it becomes
inactive by the ZERO signal.
The signal is inverted by the MATCHm signal and it be-
comes inactive by the MATCHm+1 signal.
comes inactive by the MATCHm signal.
The signal becomes active by the MATCH signal.
The signal becomes active by the MATCHm or MATCHm+1
signal.
signal.
The signal becomes active by setting the T16BnCCCTLm.
TOUTO bit to 1 and it becomes inactive by setting to 0.
Reset
R/W
H0
R/W
S1C17M20/M21/M22/M23/M24/M25
Remarks
TECHNICAL MANUAL (Rev. 1.0)

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