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®
®
Intel
Pentium
M Processor and Intel
Schematic Checklist
®
13.4
Intel
®
Table 98.
Intel
P64H2 Schematic Checklist (Sheet 1 of 5)
Checklist Items
HI[21, 20, 18:0]
PUSTRBF
PUSTRBS
PSTRBF
PSTRBS
HI_[19]
HI_RCOMP
HI_VREF
HI_VSWING
PxAD[63:32]
PxC/BE#[7:4]
PxDEVSEL#
PxFRAME#
PxIRDY#
PxTRDY#
PxSTOP#
PxPERR#
PxSERR#
PxREQ[5:0]#
PxPLOCK#
PxPAR64
PxACK64#
PxREQ64#
PAGNT3#
PBGNT3#
GNT[A]#/
GPIO[16]
GNT[B]/ GNT[5]#/
GPIO[17]
IDSEL
3.3Vaux
260
®
E7501 Chipset Platform
82870P2 (Intel P64H2) Schematic Checklist
Recommendations
Connect to the MCH.
HI[19] must be left as no connect.
• 61.9 Ω ± 1% pull-up to 1.8 V.
• The trace length between the Intel
and the resistor lead should be less than one
inch.
• Intel P64H2 Hub reference swing voltage
= 0.800 V ± 5%.
• Intel P64H2 Hub reference voltage
= 0.350 V ± 5%.
• R4 = 261 Ω ± 1%, R5 = 332 Ω ± 1%,
R6 = 750 Ω ± 1%.
• Decouple the Intel P64H2 pin with a 0.01 µF.
• Decouple the network nodes with a 0.1 µF
PCI/PCI-X Bus Interface Signals
• 8.2 k Ω ± 5% pull-up to 3.3 V.
• Pull-ups on PxAD[63:32], PxC/BE#[7:4],
PxPAR64 not needed if bus only contains 64-bit
devices
8.2 k Ω ± 5% pull-down to ground.
8.2 k Ω ± 5% pull-down to ground.
No extra pull-up needed.
The series resistor to the device IDSEL should be
100 Ω .
NOTE: The Intel P64H2 does not have an IDSEL
pin. Instead, the designer may chose a pin from
PxAD[31:17].
Leave this as unconnected on the PCI slots.
Hub Interface Signals
®
P64H2 pin
Comments
Refer to
Section 7.2.1
Refer to
Section 7.2.3
Refer to
Section 7.2.2
See PCI Specification , Rev 2.2.
These signals have integrated
pull-ups of 24 k Ω.
This has changed from the
PCI-X 1.0 Specification. There is a
specification change that allows
for values other than the original
2 k Ω value.
The Intel P64H2 does not support
PCI bus power management.
Design Guide
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