Agilent Technologies PSA Series User And Programming Manual page 348

Spectrum analyzers
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Using the STATus System
Using the Status Registers
Event Register
it latches any signal state changes, in the way
specified by the filter registers. Bits in the event
register are never cleared by signal state changes.
Event registers are cleared when read. They are also
cleared by *CLS and by presetting the instrument.
Event Enable Register
event register, will be summarized as a single output
for the register set. Summary bits are then used by the
next higher register.
The STATus:QUEStionable registers report abnormal operating
conditions. The status register hierarchy is:
1. The summary outputs from the six
STATus:QUEStionable:<keyword> detail registers are inputs to the
STATus:QUEStionable register.
2. The summary output from the STATus:QUEStionable register is an
input to the Status Byte Register. See the
The STATus:OPERation register set has no summarized inputs. The
inputs to the STATus:OPERation:CONDition register indicate the real
time state of the instrument. The STATus:OPERation:EVENt register
summary output is an input to the Status Byte Register.
What Status Register SCPI Commands Are
Most monitoring of the instrument conditions is done at the highest
level using the IEEE common commands indicated below. Complete
command descriptions are available in the IEEE commands section at
the beginning of the language reference. Individual status registers can
be set and queried using the commands in the STATus subsystem of the
language reference.
*CLS (clear status) clears the status byte by emptying the error
queue and clearing all the event registers.
*ESE, *ESE? (event status enable) sets and queries the bits in the
enable register part of the standard event status register.
*ESR? (event status register) queries and clears the event register
part of the standard event status register.
*OPC, *OPC? (operation complete) sets the standard event status
register to monitor the completion of all commands. The query stops
any new commands from being processed until the current
processing is complete, then returns a '1'.
348
it controls which of the bits, being set in the
Figure on page
353.
Chapter 6

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