Table 7.4-2 Timer 2 Control Register (T2Cr) Bits - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 7 8/16-BIT TIMER/COUNTER

Table 7.4-2 Timer 2 Control Register (T2CR) Bits

Bit
T2IF:
Bit 7 Interrupt request
flag bit
T2IE:
Bit 6 Interrupt request
enable bit
Bit 5 T2OS1, T2OS0:
Bit 4 Unused bits
T2CS1, T2CS0:
Bit 3
Clock source
Bit 2
select bits
T2STP:
Bit 1
Timer stop bit
T2STR:
Bit 0
Counter start bit
Check:
For use in 16-bit mode, write "11
to control the timer.
170
• This bit is set to "1" when the counter value in timer 2 matches the value
(comparate data latch) set in the timer 2 data register (T2DR).
• An interrupt request is output when both this bit and the interrupt request
enable bit (T2IE) are "1".
• Writing "0" clears this bit. Writing "1" has no effect and does not change
the bit value.
Note:
In 16-bit mode, the T1IF bit is enabled and the T2IF bit has no effect on
operation.
• This bit enables or disables an interrupt request output to the CPU.
• An interrupt request is output when both this bit and the interrupt request
flag bit (T2IF) are "1".
Note:
In 16-bit mode, the T1IE bit is enabled and the T2IE bit has no effect on
operation.
• This bit is not used for timer 2. Always write "00
• These bits select the count clock for the counter.
• The count clock is selected from among three internal clocks and one
external clock.
• Writing "11 " to this bit selects 16-bit mode.
B
Note:
The T1CS1 and T1CS0 bits are valid in 16-bit mode; the T2CS1 and
T2CS0 bits are used only to select 16-bit mode.
• This bit stops the counter temporarily.
• Writing "1" to this bit pauses the operation of the counter. Writing "0" to it
when the timer is active (T2STR = "1") causes the counter to resume
operation.
Note:
In 16-bit mode, the T1STP bit is enabled and the T2STP bit has no effect
on operation.
• This bit activates or stops the counter.
• Setting this bit to "1" from "0" clears the counter. If the timer is operating
continuously (T2STP = "0") at this time, the counter starts operation to
increment the count in synchronization with the selected count clock.
Writing "0" to this bit stops counter operation.
Note:
In 16-bit mode, the T1STR bit is enabled and the T2STR bit has no effect
on operation.
" to the T2CS1 and T2CS0 bits and use the T1CR register
B
Function
".
B