CHAPTER 12 WATCH PRESCALER
Figure 12.6-1 Effect of Clearing Watch Prescaler on Buzzer Output
Counter value
001F
H
0010
H
0000
H
Clock signal to
Buzzer output
This assumes that the buzzer select bits (BZ2, BZ1, BZ0) in the buzzer register (BZCR) have been set to "101".
(Output of 1024 Hz during operation at subclock oscillation divided by 32, 32.768 kHz)
272
Counter cleared by program (WPCR: WCLR =
"
"
0
)