Fujitsu F2MC-8L Series Hardware Manual page 175

CHAPTER 6 WATCHDOG TIMER
Reset controller
Generates a reset signal to the CPU when an overflow occurs on the watchdog timer counter.
Watchdog timer clear selector
Selects the watchdog timer clear signal from the timebase timer or watch prescaler at the same
time as when the count clock is selected.
Counter clear controller
Controls clearing and halting the operation of the watchdog timer counter.
Watchdog timer control register (WDTC)
The WDTC register is used to select the count clock and to activate or clear the watchdog timer
counter.
As the register is write-only, the bit manipulation instructions cannot be used.
148