Figure 10.3-1 Block Diagram Of External Interrupt Circuit 1 Pins - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 10 EXTERNAL INTERRUPT CIRCUIT 1 (EDGE)
Block Diagram of External Interrupt Circuit Pins

Figure 10.3-1 Block Diagram of External Interrupt Circuit 1 Pins

PDR (Port data register)
PDR read
PDR read
(for bit manipulation instructions)
PDR write
DDR write
SPL: Pin state specification bit in the standby control register (STBC)
Tip:
The level at pins with a pull-up resistor option selected becomes "H" at a reset or in stop or
watch mode (SPL = 1).
234
From rectangular wave output
(P34 only) of 8/16-bit timer/counter
Output latch
DDR
(Port data direction register)
Stop or watch mode (SPL=1)
From output enable signal (P34 only)
of 8/16-bit timer/counter
To edge detector
Input buffer
Pull-up resistor
(optional)
Approx. 50 k /5.0 V
P-ch
P-ch
Pin
N-ch
P34/TO/INT0
P35/INT1
P36/INT2