Figure 8.8-5 Operation In Stop Or Watch Mode (External Shift Clock); Figure 8.8-6 Operation During Halt (External Shift Clock) - Fujitsu F2MC-8L Series Hardware Manual

Operation in stop or watch mode
In stop or watch mode, serial I/O operation halts and transfer aborts, as shown in Figure 8.8-5.
After wake-up from stop or watch mode,operation restarts from the point where it halted . This
causes an error to occur on the device with which the 8-bit serial I/O is communicating.
Reinitialize the 8-bit serial I/O after wake-up from stop or watch mode.

Figure 8.8-5 Operation in Stop or Watch Mode (External Shift Clock)

SCK input
SST bit
SIOF bit
SO pin output
#0
STP bit
(STBC register)
Operation during halt
Halting operation during transfer (SMR: SST = "0") halts the transfer and clears the shift clock
counter, as shown in Figure 8.8-6. Therefore, the device being communicated with must also be
initialized. In serial output operation, set the SDR register again before reactivating. If an
external clock is input at this time, the SO pin output changes.

Figure 8.8-6 Operation during Halt (External Shift Clock)

SCK input
SST bit
SIOF bit
SO pin output
#0
8.8 States in Each Mode during 8-bit Serial I/O Operation
Stop or watch
mode request
#1 #2 #3 #4
Wake-up from stop or watch mode by an external interrupt
Operation halts
Reset SDR register
#1 #2 #3 #4
Clock for next data
Oscillation
#6 #7
stabilization
Cleared by the program
delay time
Interrupt request
#5 #6 #7
Stop or watch
Transfer error occurs.
mode
Clock for next data
#6 #7
Operation reactivated
#5 #0 #1
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