Overview Of External Interrupt Circuit 2 (Level) - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 (LEVEL)

11.1 Overview of External Interrupt Circuit 2 (Level)

External interrupt circuit 2 detects the levels of signals input to eight external interrupt
pins and generates a single interrupt request to the CPU. (This circuit is available only
in the MB89120A series.)
External Interrupt Circuit 2 Function (Level Detection)
External interrupt circuit 2 detects "L" level signals input to external interrupt pins to generate an
interrupt request to the CPU. This interrupt wakes up the CPU from standby mode to put the
device into the normal operating state (main-RUN or sub-RUN state).
External interrupt pins
External interrupt source
Interrupt control
Interrupt flag
Interrupt request
Check:
External interrupt circuit 2 is implemented only in the MB89120A series. It cannot be used in
the MB89120 series.
This function cannot be evaluated with the development tool using a one-time evaluation
product. The evaluation tool using the MB89PV130A should be used for evaluation of this
function.
246
: 8 pins (P00/INT20 to P07/INT27)
: "L" level signal input to external interrupt pins
: Enable or disable external interrupt input using the external
interrupt 2 control register (EIE2).
: Detect "L" level signal input using the external interrupt
request flag bit in the external interrupt 2 flag register (FIF2).
: Generate an interrupt request (IRQA) by ORing individual
external interrupt sources.