General-Purpose Registers; Figure 3.3-1 Register Bank Structure - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 3 CPU
3.3

General-Purpose Registers

The general-purpose registers are a memory block made up of banks, with 8 × 8-bit
registers per bank.
The register bank pointer (RP) is used to specify the register bank.
In functional terms, a total of 32 banks are available. If the internal RAM size is
insufficient for all banks, all of the banks may not be always available.
Register banks are valid for interrupt processing, vector call processing, and
subroutine calls.
Structure of General-purpose Registers
• The general-purpose registers are 8 bits and located in the register banks of the general-
purpose register area (in RAM).
• One bank contains eight registers (R0 to R7) and up to a total of 32 banks are available.
However, the number of banks available for general-purpose registers is limited on some
products if internal RAM only is used.
• The register bank currently in use is specified by the register bank pointer (RP). The lower
three bits of the operation code specify general-purpose register 0 (R0) to general-purpose
register 7 (R7).
Figure 3.3-1 shows the register bank structure.
*: The top address of a register bank = 0100
Reference:
See Section 3.1-1, "Special Areas" for the general-purpose register area available for each
product.
38

Figure 3.3-1 Register Bank Structure

Lower 3 bits of
the operation code
100 *
H R0 000
R1 001
R2 010
Bank 0
(RP= 00000---
R3 011
R4 100
R5 101
R6 110
R7 111
108 *
H
R0 000
Bank 1
:
:
(RP= 00001---
R7 111
:
:
Bank 2
:
:
:
:
Bank 30
1F8 *
H
R0 000
Bank 31
:
:
(RP= 11111---
1FF R7 111
H
+ 8 x (upper 5 bits of RP)
H
)
B
32 banks
(RAM area)
The number of banks is limited
on available RAM size.
)
B
to
)
B