Operation Of External Interrupt Circuit 2; Figure 11.6-1 External Interrupt Circuit 2 Settings - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 (LEVEL)

11.6 Operation of External Interrupt Circuit 2

The external interrupt circuit 2 can detect the "L" level of a signal input to an external
interrupt pin and generates an interrupt nequest to the CPU.
Operation of External Interrupt Circuit 2
Figure 11.6-1 shows the settings required to operate external interrupt circuit 2.
EIE2
EIF2
DDR0
: Used bit
* : Set the bit corresponding to the pin to be used to "0"
External interrupt circuit 2 generates an interrupt request IRQA to the CPU upon input of an "L"
level signal to any of the INT20 to INT27 external interrupt pins when the pin has been enabled
for external interrupt input by the corresponding external interrupt input enable bit between IE20
to IE27.
256

Figure 11.6-1 External Interrupt Circuit 2 Settings

Bit 7 Bit 6 Bit 5
IE27 IE26 IE25
— — —
* * *
Bit 4 Bit 3 Bit 2 Bit 1
IE24 IE23 IE22 IE21
— — — —
* * *
Bit 0
IE20
IF20
* *