Fujitsu F2MC-8L Series Hardware Manual page 253

CHAPTER 9 BUZZER OUTPUT
Table 9.4-1 Buzzer Register (BZCR) Bits (Continued)
Bit 2
Bit 1
Bit 0
226
Bit
These bits select the buzzer output and enable output.
•
•
BZ2, BZ1, BZ0:
Buzzer selection
bits
Note:
Tip:
Setting "000 " to these bits disables the buzzer output
B
and sets the pin as a general-purpose port (P37) or
remote-control transmission frequency output pin (RCO).
Setting other than "000
output (BZ) pin and outputs a square wave of the
selected frequency.
The buzzer output frequency can be selected from
among four different frequency-divided outputs of the
timebase timer and three different frequency-divided
outputs of the watch prescaler.
For buzzer output in subclock mode, do not select any
timebase timer frequency-divided output.
The subclock oscillates in main-stop mode. When a
watch prescaler frequency-divided output is selected for
buzzer output (BZ2, BZ1, BZ0 = "101
therefore, buzzer output is available even in main-stop
mode if the pin state specification bit (STBC: SPL) is "0".
Function
" sets the pin as the buzzer
B
to 111
B
"),
B