Figure 7.11-2 Error On Starting Counter Operation - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 7 8/16-BIT TIMER/COUNTER
Figure 7.11-2 shows the error that occurs on starting counter operation.
Counter value
Count clock
One cycle
Error
Counter activated
Using a single 8-bit channel
To use only timer 1 in the 8/16-bit timer/counter in 8-bit mode, set the timer count clock select
bits (T2CS1 and T2CS0) in the timer 2 control register (T2CR) to a value other than "11
advance. Using it without setting the register in this way causes malfunction.
Notes on setting by program
• To use the 8/16-bit timer/counter in 16-bit mode, set the count clock select bits (T2CS1 and
T2CS0) and unused bits 5 and 4 (T2OS1 and T2OS0) in the timer 2 control register (T2CR)
to "11
• To obtain the counter value during operation in 16-bit mode, be sure to read it twice to check
whether the value is valid before use.
• An attempt to initialize the square wave output during timer operation (T1CR: T1STR = "1")
does not change the output value. It is initialized when the timer stops operation.
• The device cannot resume the last operation, exiting the interrupt processing, if the interrupt
request flag bit (T1CR: T1IF, T2CR: T2IF) is "1" and the interrupt request enable bit is
enabled (T1CR: T1IE = 1, T2CR: T2IE = 1). Always clear the interrupt request flag bit.
• If stop of timer operation by the timer start bit (T1CR: T1STR = 0 or T2CR: T2STR = 0) and
generation of an interrupt source occur concurrently, the interrupt request flag bit (T1CR:
T1IF or T2CR: T2IF) is not set.
188

Figure 7.11-2 Error on Starting Counter Operation

0 n+1
Cycle of
count 0
" and "00 ", respectively.
B B
n+2 n+3 n+4
B
" in