Figure B.1-8 Vector Addressing; Figure B.1-9 Relative Addressing; Figure B.1-10 Inherent Addressing - Fujitsu F2MC-8L Series Hardware Manual

8-bit microcontroller
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APPENDIX B Overview of Instructions
Figure B.1-8 shows an example.
Relative addressing
Indicated by "rel" in the instruction list. Used to branch to a destination in the area 128 bytes
above or below the program counter (PC). Relative addressing adds the sign-extended contents
of the first operand to the PC and stores the result in the PC. Figure B.1-9 shows an example.
This example branches to the address containing the BNE operation code and therefore results
in an endless loop.
Inherent addressing
Inherent addressing is used for instructions in the instruction list that do not have operands and
for which the operation code determines the operation. The operation of inherent addressing
depends on the instruction. Figure B.1-10 shows an example.
312

Figure B.1-8 Vector Addressing

CALLV
#5
(Conversion)

Figure B.1-9 Relative Addressing

BNE
F EH
+
9ABC
Old PC
H

Figure B.1-10 Inherent Addressing

NOP
+
9ABC
H
Old PC
FFCA
FE
H
H
PC
FFCB
DC
H
H
9ABC
+ FFFE
H
H
FEDC
H
9ABA
New PC
H
9ABD
H
New PC

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