Table 12.3-1 Functions Of Watch Prescaler Control Register (Wpcr) Bits - Fujitsu F2MC-8L Series Hardware Manual

Table 12.3-1 Functions of Watch Prescaler Control Register (WPCR) Bits

Bit name
WIF:
Bit 7 Watch interrupt
request flag bit
WIE:
Bit 6 Interrupt request
enable bit
Bit 5
Bit 4 Unused bits
Bit 3
WS1, WS0:
Bit 2 Watch interrupt
Bit 1 interval time
select bits
WCLR:
Bit 0 Watch prescaler
clear bit
• This bit is set to "1" at the rising edge of the frequency-divided output
selected for the interval timer.
• The watch prescaler generates an interrupt request when this bit is set to
"1" with the interrupt request enable bit (WIE) also containing "1".
• Writing "0" to the bit clears it. Writing "1" to the bit makes no change to the
bit value and has no effect on any other part of the device.
This bit enables or disables interrupt request output to the CPU. The watch
prescaler generates an interrupt request when the interrupt request flag bit is
set to "1" with this bit also containing "1".
• The read value is indeterminate.
• Writing to this bit has no effect on the operation.
• These bits select the interval timer cycle.
• The bits specify the bit (frequency-divided output) for the interval timer of
the watch prescaler counter.
• The interval time can be selected from among four different settings.
• This bit clears the watch prescaler counter.
• Writing "0" to this bit clears the counter to "0000
makes no change to the counter, having no effect on any other part of the
device.
Tip:
The read value is always "1".
12.3 Watch Prescaler Control Register (WPCR)
Function
"; writing "1" to the bit
H
267