Port 1 Registers (Pdr1, Ddr1); Table 4.3-3 Port 1 Register Functions - Fujitsu F2MC-8L Series Hardware Manual

4.3.1

Port 1 Registers (PDR1, DDR1)

This section describes the port 1 registers.
Port 1 Register Functions
Port 1 data register (PDR1)
The PDR1 register holds the states of pins. From the bit corresponding to a pin set as an output
port pin, therefore, the same value ("0" or "1") as the output latch can be read. From the bit
corresponding to a pin set as an input port pin, the output latch value cannot be read but the pin
state is read instead.
Tip:
Since the bit manipulation instructions (SETB and CLRB) do not read pin values but output
latch values, they do not change the output latch values other than those in the bits they
manipulate.
Port 1 data direction register (DDR1)
The DDR1 register sets the direction (input or output) for each pin (bit).
Setting the bit corresponding to a port pin to "1" sets that pin as an output port pin and setting
the bit to "0" sets the pin as an input port pin.
Check:
As the DDR1 register is write-only, the bit manipulation instructions (SETB and CLRB)
cannot be used.
Table 4.3-3 lists the functions of the port 1 registers.

Table 4.3-3 Port 1 Register Functions

Register Data
0
Port 1 data
register
(PDR1)
1
0
Port 1 data
direction
register
(DDR1)
1
Read
Sets the output latch to "0"
Pin state is and outputs the L-level
"L" level. signal to the pin serving
as an output port pin.
Sets the output latch to "1"
Pin state is and outputs the H-level
"H" level. signal to the pin serving
as an output port pin.
Sets the output buffer to
"OFF" and sets the pin as
Reading is
an input pin.
not permitted
Sets the output buffer to
(write-only).
"ON" and sets the pin as
an output pin.
Read/
Write
Write
R/W
W
Address Initial value
0002 XXXXXXXX
H
0003 00000000
H
4.3 Port 1
B
B
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