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3.5.1 Addressing Capabilities
In the CPU32, setting the base register suppress (BS) bit in the full format
extension word (see Figure 3-2) suppresses use of the base address register in
calculating the EA, allowing any index register to be used in place of the base
register. Because any data register can be an index register, this provides a
data register indirect form (On). This mode could also be called register indirect
(Rn) because either a data register or an address register can be used to
address memory -
an extension of M68000 Family addressing capability.
The ability to specify the size and scale of an index register (Xn.SIZE
*
SCALE)
in these modes provides additional addreSSing flexibility. When using the SIZE
parameter, either the entire contents of the index register can be used, or the
least significant word can be sign extended to provide a 32-bit index value
(refer to Figure 3-3).
31
16 15
0
DLWI
t"~~~~~~~~~~~~~~~~D1
lS' S J
USED IN ADDRESS CALCULATION
Figure 3-3. Using SIZE in the Index Selection
For the CPU32, the register indirect modes can be extended further. Because
displacements can be 32 bits wide, they can represent absolute addresses or
the results of expressions that contain absolute addresses. This scheme allows
the general register indirect form to be (bd, Rn) or (bd, An, Rn) when the base
register is not suppressed. Thus, an absolute address can be directly indexed
by one or two registers (refer to Figure 3-4).
Setting the index register suppress bit (IS) in the full format extension word
suppresses the index operand. The indirect suppressed index register mode
uses the contents of register An as an index to the pointer located at the
address specified by the displacement. The actual data item is at the address in
the selected pointer.
An optional scaling function supports direct array subscripting.
An index
register can be left shifted by zero, one, two, or three bits before use in an EA
calculation, to scale for an array of elements of corresponding size. This is
much more efficient than using an arithmetic value in one of the general-
purpose registers to multiply the index register by one, two, four, or eight.
CPU32 REFERENCE MANUAL
DATA ORGANIZATION AND
ADDRESSING
CAPABILITIES
MOTOROLA
3-15
III
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