Motorola CPU32 Reference Manual page 354

8.3.13 Exception-Related Instructions and Operations
The exception-related instructions and operations table indicates the number of
clock periods needed for the processor to perform the specified exception-
related actions. No additional tables are needed to calculate total effective
execution time for these instructions. The total number of clock cycles is outside
the parentheses. The numbers inside parentheses (r/p/w) are included in the
total clock cycle number. All timing data assumes two-clock reads and writes.
Instruction Head Tall Cycles
BKPT (Acknowledged) 0 0
14(1/010)
BKPT (Bus Error) 0
-2
35(3/2/4)
Breakpoint (Acknowledged)
0 0 10(1/010)
Breakpoint (Bus Error) 0
-2
42(312/6)
Interrupt 0
-2
30(3/2/4)*
RESET
0 0 518(011/0)
STOP
2
0 12(01110)
LPSTOP
3
-2
25(0/3/1 )
Divide-by-Zero 0
-2
36(2/2/6)
Trace 0
-2
36(2/2/6)
TRAP # 4
-2
29(2/2/4)
ILLEGAL
0
-2
25(2/2/4)
A-line 0
-2
25(2/2/4)
F-Iine (First word illegal) 0
-2
25(2/2/4)
F-Iine (Second word illegal) ea
=
Rn
1
-2
31
(2/3/4)
F-Iine (Second word illegal) ea:f; Rn (Save)
1 1
3(0/1/0)
F-Iine (Second word illegal) ea:f; Rn (Op)
4 -2 29(2/2/4)
Privileged 0
-2
25(2/2/4)
TRAPcc (trap)
2
-2
38(2/2/6)
TRAPcc (no trap)
2
0 4(0/1/0)
TRAPcc.W (trap)
2
-2
38(2/2/6)
TRAPcc.W (no trap) 0 0 4(0/2/0)
TRAPcc.L (trap) 0
-2
38(2/2/6)
TRAPcc.L (no trap) 0 0 6(0/3/0)
TRAPV (trap)
2
-2
38(2/2/6)
TRAPV (no trap)
2
0 4(01110)
*Minimum interrupt acknowledge cycle time is assumed to be three clocks.
NOTE: The F-Iine (Second word illegal) operation involves a save step which other
operations do not have. To calculate total the operation time, calculate the Save,
the calculate effective address, and the Operation execution times, and combine in
the order listed, using the equations given in 8.1.6 Instruction Execution
Time Calculation.
CPU32 REFERENCE MANUAL
INSTRUCTION EXECUTION
TIMING
MOTOROLA
8-27
III