Motorola CPU32 Reference Manual page 246

M68300 series central processor unit
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ROL, ROR
15
14
13
12
11
10
9
8
7
6
I
1
I
1 I
1 I
0
I COUNTIREGISTERI
dr
SIZE
Count/Register Field:
If I/R Field
=
0, Specifies Shift Count
If I/R Field
=
1, Specifies Data Register that contains Shift Count
dr Field: 0
=
Right 1
=
Left
Size Field: 00
=
Byte 01
=
Word 10
=
Long
I/R Field: 0
=
Immediate Shift Count 1
=
Register Shift Count
ASL, ASR (Memory)
15
14
13
12
11
10
9
8
7
6
1
1
1
0
0
0
0
dr
1
1
dr Field: 0
=
Right 1
=
Left
LSL, LSR (Memory)
15
14
13
12
11
10
9
8
7
6
1
1
1
0
0
0
1
dr
1
1
dr Field: 0
=
Right 1 = Left
ROXL, ROXR (Memory)
15
14
13
12
11
10
9
8
7
6
1
1
1
0
0
1
0
dr
1
1
dr Field: 0
=
Right 1
=
Left
ROL, ROR (Memory)
15
14
13
12
11
10
9
8
7
6
1
1
1
0
0
1
1
dr
1
1
dr Field: 0
=
Right 1
=
Left
CPU32 REFERENCE MANUAL
INSTRUCTION SET
5
i/r
5
5
5
5
4
3
2
0
REGISTER
4
3
2
0
EFFECTIVE ADDRESS
MODE
I
REGISTER
4
3
2
o
EFFECTIVE ADDRESS
MODE
I
REGISTER
4
3
2
o
EFFECTIVE ADDRESS
MODE
I
REGISTER
4
3
2
o
EFFECTIVE ADDRESS
MODE
I
REGISTER
MOTOROLA
4-193
III

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