Motorola CPU32 Reference Manual page 168

M68300 series central processor unit
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MULU
Operation:
Assembler
Syntax:
Attributes:
Unsigned Multiply
Source
*
Destination
~
Destination
MULU.W (ea), On
MULU.L (ea), 01
MULU.L (ea), Dh:DI
Size
=
(Word, Long)
16x16
~
32
32x32
~
32
32x32
~64
MULU
Description:
Multiplies two unsigned operands yielding an unsigned result.
In the word form, the multiplier and multiplicand are both word operands, and the result is a long
word operand. A register operand is the low-order word; the upper word of the register is ignored.
All 32 bits of the product are saved in the destination data register.
In the long form, the multiplier and multiplicand are both long word operands, and the result is
either a long word or a quad word. The long word result is the low-order 32 bits of the quad word
III
result; the high-order 32 bits of the product are discarded.
Condition Codes:
x
N
z
v
c
o
X Not affected.
N Set if the result is negative. Cleared otherwise.
Z Set if the result is zero. Cleared otherwise.
V Set if overflow. Cleared otherwise.
C Always cleared.
NOTE
Overflow (V=1) can occur only when multiplying 32-bit operands to yield a 32-bit
result. Overflow occurs if any of the high-order 32 bits of the quad word product
are not equal to zero.
CPU32 REFERENCE MANUAL
INSTRUCTION SET
MOTOROLA
4-115

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