Motorola CPU32 Reference Manual page 91

III
ASL, ASR Arithmetic Shift
ASL, ASR
Condition Codes:
x
N
z
v
C
X Set according to the last bit shifted out of the operand. Unaffected for a shift count of zero.
N Set if the most significant bit of the result is set. Cleared othelWise.
Z Set if the result is zero. Cleared othelWise.
V Set if the most significant bit is changed during the shift operation. Cleared othelWise.
C Set according to the last bit shifted out of the operand. Cleared for a shift count of zero.
Instruction Format (Register Shifts):
15 14 13 12 11 10 9 8 7 6 5
4 3
2 1 0
\ 1 \ 1 \ 1 \ 0 \COUNTIREGISTER\ dr
SIZE
ilr o \
0
REGISTER
Instruction Fields (Register' Shifts):
CounVRegister field - Specifies shift count or register that contains shift count:
If
i/r
=
0, this field contains the shift count. The values one to seven represent counts of one to
seven; value of zero represents a count of eight.
If
i/r
=
1, this field specifies the data register that contains the shift count (modulo 64).
dr field - Specifies the direction of the shift:
o -
Shift right
1 - Shift left
Size field - Specifies the size of the operation:
00 - Byte operation
01 - Word operation
10 - Long operation
i/r field:
If i/r
=
0, specifies immediate shift count.
If i/r
=
1, specifies register shift count.
Register field - Specifies a data register to be shifted.
MOTOROLA
4-38
INSTRUCTION SET
CPU32 REFERENCE MANUAL