Motorola CPU32 Reference Manual page 222

M68300 series central processor unit
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TRAP
Operation:
Assembler
Syntax:
Attributes:
Trap
SSP - 2 => SSP; Format/Offset => (SSP);
SSP - 4 => SSP; PC => (SSP); SSP - 2 => SSP;
SR => (SSP); Vector Address => PC
TRAP #(vector)
Unsized
TRAP
Description:
Causes a TRAP #(vector) exception. A vector number is generated by adding the
immediate vector operand to 32. The range of vector operand values is 0-5, thus there are 16
possible vector numbers.
Condition Codes:
Not affected.
Instruction Format:
15
14
13
12
11
10
9
8
7
0
I
1
I
0
I
0
I
1
1
1
I
0
I
0
I
Instruction Fields:
Vector field - Specifies the trap vector to be taken.
CPU32 REFERENCE MANUAL
INSTRUCTION SET
6
5
4
1
I
0
I
0
3
I
2
1
0
VECTOR
MOTOROLA
4-169
III

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