Motorola CPU32 Reference Manual page 69

Table 4-9. System Control Operations (Continued)
Instruction
BKPT
BGND
CHK
CHK2
ILLEGAL
TRAP
TRAPcc
TRAPV
ANDI
EaRl
MOVE
ORI
MOTOROLA
4-16
Syntax
#(data)
none
(ea), Dn
(ea), Rn
none
#(data)
none
#(data)
none
#(data), CCR
#(data), CCR
(ea), CCR
CCR, (ea)
#(data), CCR
Size Operation
Trap Generating
If breakpoint cycle acknowledged, then execute
none returned operation word, else trap as illegal
instruction.
If background mode enabled, then enter
none
background mode, else formaVvector offset
=>
- (SSP);
PC
=> -
(SSP); SR
=> -
(SSP); (vector)
=>
PC
16,32 If Dn < 0 or Dn < (ea), then CHK exception
8,16,32
If Rn < lower bound or Rn
>
upper bound, then
CHK exception
SSP - 2
=>
SSP; vector offset
=>
(SSP);
SSP - 4
=>
SSP; PC
=>
(SSP);
none
SSP - 2
=>
SSP; SR
=>
(SSP);
lIegal instruction vector address
=>
PC
SSP - 2
=>
SSP; formaVvector offset
=>
(SSP);
none
SSP - 4
=>
SSP; PC
=>
(SSP); SR
=>
(SSP);
vector address
=>
PC
none
16,32
If cc true, then TRAP exception
none If V set, then overflow TRAP exception
Condition Code Register
8
Data. CCR
=>
CCR
8
Data E9 CCR
=>
CCR
16
Source
=>
CCR
16
CCR
=>
Destination
8
Data
+
CCR
=>
CCR
INSTRUCTION SET
CPU32 REFERENCE MANUAL