Motorola CPU32 Reference Manual page 213

M68300 series central processor unit
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TBLS
TBLSN
Table Lookup and Interpolate (Signed)
TBLS
TBLSN
Signed table entries range from _2n-1 to 2n-1 - 1, where n is 8, 16, or 32 for byte, word, and long-
word tables, respectively.
Rounding of the result is optionally selected via the 'R' instruction field. If R
=
0 (TBLS), the
fractional portion is rounded according to the round-to-nearest algorithm.
The rounding
procedure can be summarized by the following table.
Adjusted
Difference
Rounding
Fraction
Adjustment
1
-1
n~-2"
1
1
+0
-2"<n<2"
n>l
-2
+1
The adjusted difference is then added to the selected table entry. The rounded result is returned
in the destination data register, Ox. Only the portion of the register corresponding to the selected
size is affected.
BYTE
WORD
LONG
31
UNAFFECTED
UNAFFECTED
RESULT
24
23
UNAFFECTED
UNAFFECTED
RESULT
16
15
8
7
o
UNAFFECTED
RESULT
RESULT
RESULT
RESULT
RESULT
If R =1 (TBLSN), the result is returned in register Ox without rounding. If the size is byte, the
integer portion of the result is returned in Ox [15:8]. The integer portion of a word result is stored
in Ox [23:8]. The least significant 24 bits of a long result are stored in Ox [31 :8]. Byte and word
results are sign extended to fill the entire 32-bit register.
BYTE
WORD
LONG
MOTOROLA
4-160
31
24
23
16
15
8
7
o
SIGN EXTENDED
SIGN EXTENDED
RESULT
FRACTION
SIGN EXTENDED
RESULT
RESULT
FRACTION
RESULT
RESULT
RESULT
FRACTION
NOTE
A long-word result contains only the least significant 24 bits of integer precision.
INSTRUCTION SET
CPU32 REFERENCE MANUAL

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