Motorola CPU32 Reference Manual page 67

M68300 series central processor unit
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Table 4-8. Program Control Operations
Instruction
Syntax
Operand
Operation
Size
Conditional
Bee
(label)
8,16,32
If condition true, then PC + d => PC
Dn, (label)
If condition false, then Dn - 1
=>
PC;
DBcc
16
if Dn ". (- 1), then PC + d => PC
Sec
(ea)
8
If condition true, then destination bits are set to 1;
else, destination bits are cleared to 0
Unconditional
BRA
(label)
8,16,32
PC+d =>PC
BSR
(label)
8,16,32
SP - 4 => SP; PC => (SP); PC + d => PC
JMP
(ea)
none
Destination => PC
JSR
(ea)
none
SP - 4 => SP; PC => (SP); destination => PC
NOP
none
none
PC+ 2=> PC
Returns
RID
#(d)
16
(SP) => PC; SP + 4 + d => SP
RlR
(SP) => CCR; SP + 2 => SP; (SP) => PC;
none
none
SP +4=>SP
RTS
none
none
(SP) => PC; SP + 4 => SP
To specify conditions for change in program control, condition codes must be
substituted for the letters "cc" in conditional program control opcodes. Condition
test mnemonics are given below.
Refer to 4.3.10 Condition Tests for
detailed information on condition codes.
CC
Carry clear
CS
Carry set
EQ
Equal
F
False*
GE
Greater or equal
GT
Greater than
HI
High
LE
Less or equal
*Not applicable to the Bcc instruction
MOTOROLA
4-14
INSTRUCTION SET
LS
Low or same
LT
Less than
MI
Minus
NE
Not equal
PL
Plus
T
True
VC
Overflow clear
VS
Overflow set
CPU32 REFERENCE MANUAL

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