System Control Instructions - Motorola CPU32 Reference Manual

4.3.9 System Control Instructions
Privileged instructions, trapping instructions, and instructions that use or modify
the condition code register provide system control operations. All of these
instructions cause the processor to flush the instruction pipeline. Table 4-9
summarizes the instructions. The preceding list of condition tests also applies
to the TRAPcc instruction. Refer to 4.3.10 Condition Tests for detailed
information on condition codes.
Table 4-9. System Control Operations
Instruction Syntax
ANDI
#(data), SR
EORI
#(data), SR
(ea), SR
MOVE
SR, (ea)
USP, An
MOVEA
An, USP
MOVEC
RC,Rn
Rn,Rc
MOVES
Rn, (ea)
(ea), Rn
ORI
#(data), SR
RESET none
RTE none
STOP
#(data)
LPSTOP
#(data)
CPU32 REFERENCE MANUAL
Size Operation
Priveleged
16
Data. SR
=>
SR
16
Data Ell SR => SR
16
Source => SR
16
SR => Destination
32
USP =>An
32
An => USP
32
Rc
=>
Rn
32
Rn => Rc
8,16,32
Rn => Destination using DFC
Source using SFC => Rn
16
Data
+
SR => SR
none Assert RESET line
(SP) => SR; SP + 2
=>
SP; (SP) => PC;
none
SP +4=>SP;
restore stack according to format
16
Data => SR; STOP
none
Data => SR; interrupt mask => EBI; STOP
INSTRUCTION SET
MOTOROLA
4-15
III