Motorola CPU32 Reference Manual page 98

BCLR Test a Bit and Clear
BCLR
Instruction Fields (Bit Number Static):
Bit Number field - Specifies the bit number.
Effective Address field - Specifies the destination location.
Only data alterable addressing modes are allowed as shown:
Addressing Mode Mode Register Addressing Mode Mode Register
Dn*
000
Reg. number: Dn (xxx).w
111 000
An
- -
(xxx).L
111 001
(An)
010
Reg. number: An
#(data) - -
(An) +
011
Reg. number: An
-(An)
100
Reg. number: An
(d16, An)
101
Reg. number: An (d16, PC)
-
-
(de, An, Xn)
110 Reg. number: An
(de, PC, Xn)
- -
(bd, An, Xn)
110
Reg. number: An (bd, PC, Xn)
-
-
*Long only; all others are byte only
Instruction Format (Bit Number Dynamic, specified in a register):
15 14 13 12 11 10
9
a
7 6 5
4 3 2
o
EFFECTIVE ADDRESS
0
a
0 0
REGISTER
1 1 0
I
MODE REGISTER
Instruction Fields (Bit Number Dynamic):
Register field - Specifies the data register that contains the bit number.
Effective Address field - Specifies the destination location. Only data alterable addressing
modes are allowed as shown:
Addressing Mode Mode Register
Addressing Mode
Dn*
000
Reg. number: Dn (xxx).w
An
- -
(xxx).L
(An)
010
Reg. number: An
#(data)
(An)
+ 011
Reg. number: An
-(An) 100
Reg. number: An
(d16, An) 101
Reg. number: An (d16, PC)
(da, An, Xn)
110
Reg. number: An
(de, PC, Xn)
(bd, An, Xn) 110 Reg. number: An
(bd, PC, Xn)
*Long only; all others are byte only
CPU32 REFERENCE MANUAL
INSTRUCTION SET
Mode
111
111
-
-
-
-
Register
000
001
-
-
-
-
MOTOROLA
4-45
III