Motorola CPU32 Reference Manual page 289

M68300 series central processor unit
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A BERR exception handler should execute RTE after correcting a fault. RTE
restores the internal machine state, fetches the address of the original exception
handler, recreates the original exception stack frame, and resumes execution at
the exception handler address.
If the fault is intractable, the exception handler should rewrite the faulted
exception stack frame at SP
+
$14
+
$06 and then jump directly to the original
exception handler. The stack frame can be generated from the information in
the BERR frame: the pre-exception status register (SP
+
$OC), the format/vector
word (SP
+
$OE), and, if the frame being written is a six-word frame, the
program counter of the instruction causing the exception (SP
+
$1 0). The return
program counter value is available at SP
+
$02.
A stacked fault address equal to the current stack pointer may indicate that,
although the first exception received a BERR while stacking, the BERR
exception stacking was successfully completed.
This is an extremely
improbable occurrence, but the CPU32 supports recovery from it. Once the
exception handler determines that the fault has been corrected, recovery can
proceed as described previously. If the fault cannot be corrected, move the
supervisor stack to another area of memory, copy all valid stack frames to the
new stack, create a faulted exception frame on top of the stack, and resume
execution at the exception handler address.
6.4 CPU32 Stack Frames
The CPU32 generates three different stack frames -
the normal four- and six-
word frames, and the twelve-word BERR stack frame.
6.4.1 Normal Four-Word Stack Frame
This stack frame is created by interrupt, format error, TRAP #n, illegal instruction,
A-line and F-line emulator trap, and privilege violation exceptions. Depending
on the exception type, the program counter value is either the address of the
next instruction to be executed or the address of the instruction that caused the
exception (see Figure 6-3).
MOTOROLA
6-26
EXCEPTION
PROCESSING
CPU32 REFERENCE MANUAL

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