Motorola CPU32 Reference Manual page 138

M68300 series central processor unit
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ILLEGAL
Take Illegal Instruction Trap
Operation:
Assembler
Syntax:
Attributes:
SSP - 2
~
SSP; Vector Offset
~
(SSP);
SSP - 4
~
SSP; PC
~
(SSP);
SSP - 2
~
SSP; SR
~
(SSP);
Illegal Instruction Vector Address
~
PC
ILLEGAL
Unsized
ILLEGAL
Description:
Forces an illegal instruction exception, vector number 4. All other illegal instruction bit
patterns are reserved for future extension of the instruction set and should not be used to force
an exception.
Condition Codes:
Not affected
Instruction Format:
15
14
13
12
11
10
9
8
7
o
o
I
CPU32 REFERENCE MANUAL
INSTRUCTION SET
6
5
4
3
2
o
o
I
0
I
MOTOROLA
4-85
III

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