Motorola CPU32 Reference Manual page 215

M68300 series central processor unit
Hide thumbs Also See for CPU32:
Table of Contents

Advertisement

III
TBLS
TBLSN
Table Lookup and Interpolate (Signed)
Data Register Interpolate:
14
13
12
10
9
8
7
6
5
Instruction Fields:
Effective address field (table lookup and interpolate mode only):
4
3
TBLS
TBLSN
2
0
REGISTER Oym
REGISTER Dyn
Specifies the source location. Only control addressing modes are allowed as shown:
Addressing Mode
Mode
Register
On
-
-
An
-
-
(An)
010
Reg. number: An
(An)
+
-
-
-(An)
-
-
(d16,
An)
101
Reg. number: An
(dS,
An, Xn)
110
Reg. number: An
(bd, An, Xn)
110
Reg. number: An
Size field:
Specifies the size of operation.
00 -
byte operation
01 - word operation
10 -
long operation
Register field:
Addressing Mode Mode
Register
(xxx).W
111
000
(xxx).L
111
001
#(data)
-
-
(d16, PC)
111
010
(dS,
PC, Xn)
111
011
(bd, PC, Xn)
111
011
Specifies the destination data register, Ox. On entry, the register contains the interpolation
fraction and entry number.
Oym, Dyn field:
If the effective address mode field is nonzero, this operand register is unused and should
be zero. If the effective address mode field is zero, the surface interpolation variant of this
instruction is implied, and Dyn specifies one of the two source operands.
Rounding mode field:
MOTOROLA
4-162
The 'R' bit controls rounding of the final result. When R
=
0, the result is rounded according
to the round-to-nearest algorithm. When R
=
1, the result is returned unrounded.
INSTRUCTION SET
CPU32 REFERENCE MANUAL

Advertisement

Table of Contents
loading

Table of Contents