Organization In Memory - Motorola CPU32 Reference Manual

2.3.2 Organization in Memory
Memory is organized on a byte-addressable basis. An address corresponds to
a high-order byte. For example, the address (N) of a long-word data item is the
address of the most significant byte of the high-order word. The address of the
most significant byte of the low-order word is (N
+
2), and the address of the
2
least significant byte of the long word is (N
+
3). The CPU32 requires data
words and long words, as well as instruction words to be aligned on word
boundaries. Data misalignment is not supported. Figure 2-6 shows how
operands and instructions are organized in memory. Note that (N
+
X) is below
(N) - that is, address value increases as one moves down the page.
CPU32 REFERENCE MANUAL ARCHITECTURE SUMMARY
MOTOROLA
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