Motorola CPU32 Reference Manual page 317

M68300 series central processor unit
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Command Sequence:
Operand Data:
Two operands are required for this instruction. The first operand is a long-
word absolute address that specifies a location to which the operand data is
to be written. The second operand is the data. Byte data is transmitted as a
16-bit word, justified in the least significant byte. 16- and 32-bit operands are
transmitted as 16 and 32 bits, respectively.
Result Data:
Successful write operations return a status of $OFFFF. Bus or address errors
on the write cycle are indicated by the assertion of bit 16 in the status
message and by a data pattern of $0001.
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CPU32 REFERENCE MANUAL

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