Motorola CPU32 Reference Manual page 106

M68300 series central processor unit
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BTST
Test a Bit
BTST
Instruction Fields (Bit Number Static):
Bit Number field - Specifies the bit number.
Effective Address field -
Specifies the destination location. Only data addressing modes are
allowed as shown:
Addressing Mode
Mode
Register
Addressing Mode Mode
Register
Dn*
000
Reg. number: Dn
(xxx).W
111
000
An
-
-
(xxx).L
111
001
(An)
010
Reg. number: An
#(data)
-
-
(An)
+
011
Reg. number: An
-(An)
100
Reg. number: An
(d16, An)
101
Reg. number: An
(d16, PC)
111
010
(dg, An, Xn)
110
Reg. number: An
(da, PC, Xn)
111
011
(bd, An, Xn)
110
Reg. number: An
(bd, PC, Xn)
111
011
*Long only; all others are byte only
Instruction Format (Bit Number Dynamic, specified in a register):
15
14
13
12
11
10
9
9
7
6
5
4
3
2
o
EFFECTIVE ADDRESS
0
0
0
0
REGISTER
1
0
0
I
MODE
REGISTER
Instruction Fields (Bit Number Dynamic):
Register field - Specifies the data register that contains the bit number.
Effective Address field -
Specifies the destination location. Only data addressing modes are
allowed as shown:
Addressing Mode
Mode
Register
Addressing Mode
Dn*
000
Reg. number: Dn
(xxx).W
An
-
-
(xxx).L
(An)
010
Reg. number: An
#(data)
(An)
+
011
Reg. number: An
-(An)
100
Reg. number: An
(d16, An)
101
Reg. number: An
(d16, PC)
(dg, An, Xn)
110
Reg. number: An
(da, PC, Xn)
(bd, An, Xn)
110
Reg. number: An
(bd, PC, Xn)
*Long only; all others are byte only
CPU32 REFERENCE MANUAL
INSTRUCTION SET
Mode
111
111
111
111
111
111
Register
000
001
100
010
011
011
MOTOROLA
4-53
III

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