Motorola CPU32 Reference Manual page 201

M68300 series central processor unit
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STOP
Operation:
Assembler
Syntax:
Attributes:
Load Status Register and Stop
(Privileged Instruction)
If supervisor state
then Immediate Data
~
SR; STOP
else TRAP
STOP #(data)
Unsized
STOP
Oescri ptio n:
Moves the immediate operand into the status register (both user and supervisor
portions), advances the program counter to point to the next instruction, and stops the fetching
and executing of instructions. A trace, interrupt, or reset exception causes the processor to
resume instruction execution. A trace exception occurs if instruction tracing is enabled (TO = 1,
T1=0) when the STOP instruction begins execution. If an interrupt request is asserted with a
priority higher than the priority level set by the new status register value, an interrupt exception
occurs; otherwise, the interrupt request is ignored. External reset always initiates reset exception
processing.
Condition Codes:
Set according to the immediate operand.
Instruction Format:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
o
o
1
0
I
0
1
1 0 0
1
o
I
0
o
IMMEDIATE DATA
Instruction Fields:
Immediate field - Specifies the data to be loaded into the status register.
MOTOROLA
4-148
INSTRUCTION SET
CPU32 REFERENCE MANUAL

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