Motorola CPU32 Reference Manual page 28

31 30
1 0
MSB
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I
LSB
BYTE
31 24 23 1615 8 7
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HIGH-ORDER BYTE MIDDLE HIGH BYTE
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MIDDLE LOW BYTE
LOW-ORDER BYTE
31
31
63 62
MSB
31
HIGH-ORDER WORD
WORD
16 15
LONG WORD
LONG WORD
QUAD WORD
HIGH-ORDER LONG WORD
LOW-ORDER LONG WORD
LOW-ORDER WORD
Figure 2-4. Data Organization in Data Registers
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32
1 0
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LSB
Quad-word data consists of two long words: for example, the product of 32-bit
multiply or the quotient of 32-bit divide operations (signed and unsigned). Quad
words may be organized in any two data registers without restrictions on order
or pairing. There are no explicit instructions for the management of this data
type; however, the MOVEM instruction can be used to move a quad word into or
out of the registers.
BCD data represents decimal numbers in binary form. CPU32 BCD instructions
use a format in which a byte contains two digits - the four LSB contain the low
digit, and the four MSB contain the high digit. The ABCD, SBCD, and NBCD
instructions operate on two BCD digits packed into a single byte.
CPU32 REFERENCE MANUAL
ARCHITECTURE SUMMARY
MOTOROLA
2-5
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