Motorola CPU32 Reference Manual page 259

M68300 series central processor unit
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III
5.2 Privilege Levels
To protect system resources, the processor can operate with either of two levels
of access -
user or supervisor. Supervisor level is more privileged than user
level. All instructions are available at the supervisor level, but execution of
some instructions is not permitted at the user level. There are separate stack
pointers for each level. The S bit in the status register indicates privilege level,
and determines which stack pointer is used for stack operations. The processor
identifies each bus access (supervisor or user mode) via function codes to
enforce supervisor and user access levels.
In a typical system most programs execute at the user level. User programs can
access only their own code and data areas, and are restricted from accessing
other information. The operating system executes at the supervisor privilege
level, has access to all resources, performs the overhead tasks for the user level
programs, and coordinates their activities.
5.2.1 Supervisor Privilege Level
If the S bit in the status register is set, supervisor privilege level applies, and all
instructions are executable. The bus cycles generated for instructions executed
in supervisor level are normally classified as supervisor references, and the
values of the function codes on FC2-FCO refer to supervisor address spaces.
All exception processing is performed at the supervisor level. All bus cycles
generated during exception processing are supervisor references, and all stack
accesses use the supervisor stack pointer.
Instructions that have important system effects can only be executed at
supervisor level. For instance, user programs are not permitted to execute
STOP, LPSTOP, or RESET instructions.
To prevent a user program from
gaining privileged access, except in a controlled manner, instructions that can
alter the S bit in the status register are privileged. The TRAP #n instruction
provides controlled user access to operating system services.
5.2.2 User Privilege Level
If the S bit in the status register is cleared, the processor executes instructions at
the user privilege level. The bus cycles for an instruction executed at the user
privilege level are classified as user references, and the values of the function
codes on FC2-FCO specify user address spaces. While the processor is at the
user level, implicit references to the system stack pointer and explicit references
to address register seven (A7) refer to the user stack pointer (USP).
MOTOROLA
5-2
PROCESSING STATES
CPU32 REFERENCE MANUAL

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