Motorola CPU32 Reference Manual page 280

the proper internal registers, de-allocates the stack (12 words), and resumes
normal processing. Bus error frames for faults during exception processing
require the RTE instruction to rewrite the faulted stack frame. If an error occurs
during any of the bus cycles required by rewrite, the processor halts.
If a format error occurs during RTE execution, the processor creates a normal
four-word fault stack frame below the frame that it was attempting to use. If a
bus error occurs, a bus-error stack frame will be created. The faulty stack frame
remains intact, so that it may be examined and repaired by an exception
handler, or used by a different type of processor (e.g., an MC68010, MC68020,
or a future M68000 processor) in a multiprocessor system.
6.3 Fault Recovery
There are four phases of recovery from a fault: recognizing the fault, saving the
processor state, repairing the fault (if possible), and restoring the processor
state. Saving and restoring the processor state are described in the following
paragraphs.
The stack contents are identified by the special status word (SSW). In addition
to identifying the fault type represented by the stack frame, the SSW contains
the internal processor state corresponding to the fault.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 0
I
lP
I
MV
I
0
I
1R
I
B1
I
BO
I
FR
I
AM
I
IN
I
Fm
I
LG
I
SIZ FUNC
TP
MV
TR
B1
BO
RR
RM
IN
RW
LG
SIZ
FUNC
BERR frame type
MOVEM in progress
Trace pending
Breakpoint channel 1 pending
Breakpoint channel
°
pending
Rerun write cycle after RTE
Faulted cycle was read-modify-write
Instruction/other
Read/write of faulted bus cycle
Original operand size was long word
Remaining size of faulted bus cycle
Function code of faulted bus cycle
The TP field defines the class of the faulted bus operation. Two BERR
exception frame types are defined. One is for faults on prefetch and operand
accesses, and the other is for faults during exception frame stacking:
CPU32 REFERENCE MANUAL EXCEPTION PROCESSING MOTOROLA
6-17
•