Motorola CPU32 Reference Manual page 145

III
LSL, LSR Logical Shift
LSL, LSR
Condition Codes:
x
N Z
v
C
o
X Set according to the last bit shifted out of the operand. Unaffected for a shift count of zero.
N Set if the result is negative. Cleared otherwise.
Z
Set if the result is zero. Cleared otherwise.
V
Always cleared.
C Set according to the last bit shifted out of the operand. Cleared for a shift count of zero.
Instruction Format (Register Shifts):
15 14 13 12 11 10 9 8 7 6 5 4 3
2 0
o
!COUNTIREGISTER! dr
SIZE ifr
o
REGISTER
Instruction Fields (Register Shifts):
Count/Register field - Specifies shift count or register that contains shift count:
If i/r
=
0, this field contains the shift count. The values one to seven represent counts of one to
seven; value of zero represents a count of eight.
If i/r
=
1, this field specifies the data register that contains the shift count (modulo 64).
dr field - Specifies the direction of the shift: ° -
Shift right
1 - Shift left
Size field - Specifies the size of the operation:
00 - Byte operation
01 - Word operation
1
° -
Long operation
i/r field:
If i/r
=
0, specifies immediate shift count.
If i/r
=
1, specifies register shift count.
Register field - Specifies a data register to be shifted.
MOTOROLA
4-92
INSTRUCTION SET CPU32 REFERENCE MANUAL