Motorola CPU32 Reference Manual page 90

M68300 series central processor unit
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ASL, ASR
Arithmetic Shift
ASL, ASR
Operation:
Assembler
Syntax:
Attributes:
Destination Shifted by (count)
=:}
Destination
ASd DX,Dy
ASd #(data), Dy
ASd (ea)
where d is direction, Lor R
Size
=
(Byte, Word, Long)
Description:
Arithmetically shifts the bits of the operand in the direction (L or R) specified. The carry
bit receives the last bit shifted out of the operand. The shift count for shifting a register may be
specified in two ways:
1. Immediate - Shift count is specified by the instruction (shift range, 8-1).
2. Register -
The shift count is the value in the data register specified by the instruction,
modulo 64.
An operand in memory can be shifted one bit only, and the operand size is restricted to a word.
For ASL, the operand is shifted left; the number of positions shifted is the shift count. Bits shifted
out of the high-order bit go to both the carry and the extend bits; zeros are shifted into the low-
order bit. The overflow bit indicates if any sign changes occur during the shift.
ASL:
~~--~---L
____
OP_E_RA_N_D __
~~
For ASR, the operand is shifted right; the number of positions shifted is the shift count. Bits
shifted out of the low-order bit go to both the carry and the extend bits; the sign-bit (MSB) is
shifted into the high-order bit.
ASR:
CPU32 REFERENCE MANUAL
~_B~
___ O_P_ER_A_ND ____
~
INSTRUCTION SET
MOTOROLA
4-37
III

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