Motorola CPU32 Reference Manual page 84

M68300 series central processor unit
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AND
Operation:
Assembler
Syntax:
Attributes:
Logical AND
Source. Destination
=>
Destination
AND (ea),Dn
AND Dn, (ea)
Size
=
(Byte, Word, Long)
AND
Description:
Performs an AND operation of the source operand with the destination operand and
stores the result in the destination location. The contents of an address register may not be used
as an operand.
Condition Codes:
x
N
z
v
C
o
0
X Not affected.
N Set if the most significant bit of the result is set. Cleared otherwise.
Z Set if the result is zero. Cleared otherwise.
V Always cleared.
C Always cleared.
Instruction Format:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
a
EFFECTIVE ADDRESS
1
1
0
0
REGISTER
OPMODE
Instruction Fields:
Register field - Specifies any of the eight data registers.
Opmode field:
Byte
000
100
CPU32 REFERENCE MANUAL
Word
001
101
Long
010
110
Operation
«ea» • (On»
=:}
On
«On» • (ea»
=:}
ea
INSTRUCTION SET
MODE
I
REGISTER
MOTOROLA
4-31
III

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