Motorola CPU32 Reference Manual page 267

M68300 series central processor unit
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II
6.1.4 Exception Stack Frame
During exception processing, the most volatile portion of the current context is
saved on the top of the supervisor stack. This context is organized in a format
called the exception stack frame.
The exception stack frame always includes the contents of status register and
program counter at the time the exception occurred.
To support generic
handlers, the processor also places the vector offset in the exception stack
frame and marks the frame with a format code. The format field allows an RTE
instruction to identify stack information so that it can be properly restored.
The general form of the exception stack frame is illustrated in Figure 6-1.
Although some formats are peculiar to a particular M68000 Family processor,
format 0000 is always legal and always indicates that only the first four words of
a frame are present.
See 6.4 CPU32 Stack Frames for a complete
discussion of exception stack frames.
SP
(AFTER STACKING)
~
CI)
w
~
w
a:
c
~
a:
w
::r:
o
:E
j
o
15
STATUS REGISTER
PROGRAM COUNTER HIGH
PROGRAM COUNTER LOW
FORMAT
I
VECTOR OFFSET
OTHER PROCESSOR STATE INFORMATION,
DEPENDING ON EXCEPTION
11
(0, 2, OR 8 WORDS)
Figure 6-1. Exception Stack Frame
6.1.5 Multiple Exceptions
Each exception has been assigned a priority based on its relative importance to
system operation.
Priority assignments are shown in Table 6-2. Group 0
exceptions have the highest priorities. Group 4 exceptions have the lowest
priorities.
Exception processing for exceptions that occur simultaneously is
done by priority, from highest to lowest.
MOTOROLA
6-4
EXCEPTION
PROCESSING
CPU32 REFERENCE MANUAL

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