Motorola CPU32 Reference Manual page 333

EI
To trace instruction execution time by monitoring the external bus, note that the
order of operand accesses for a particular instruction sequence is always the
same - provided bus speed is unchanged, the interleaving of instruction
prefetches with operands within each sequence is identical.
8.1.6 Instruction Execution Time Calculation
The overall execution time for an instruction depends on the amount of overlap
with previous and following instructions. In order to calculate an instruction time
estimate, the entire code sequence must be analyzed. To derive the actual
instruction execution times for an instruction sequence, the instruction times
listed in the tables must be adjusted to account for overlap.
The formula for this calculation is:
where:
CN is the number of cycles listed for instruction N
HN is the head time for instruction
N
TN is the tail time for instruction N
min (TN, HM) is the minimum of parameters TN and HM
The number of cycles for the instruction (CN above), can include one or two
effective address calculations in addition to the raw number in the cycles
column. In these cases, calculate overall instruction time as if it were for
multiple instructions, using the following equation:
(CEA) - min (TEA, Hop)
+
Cop
where:
(CEA) is the instruction's effective address time
Cop is the instruction's operation time
Hop is the instruction operation's head time
TEA is the effective address's tail time
min (TN, HM) is the minimum of parameters TN and HM
The overall head for the instruction is the head for the effective address, and the
overall tail for the instruction is the tail for the operation. Therefore, the actual
equation for execution time becomes:
MOTOROLA
8-6
COP1 - min (TOP1, HEA2)
+
(CEA)2 - min (TEA2, HOP2)
+
COP2 - min (TOP2, HEA3)
+ ...
INSTRUCTION EXECUTION
CPU32 REFERENCE MANUAL
TIMING