At Opdbrh0 And Opdbrl0 Write - Fujitsu MB95630H Series Hardware Manual

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CHAPTER 21 MULTI-PULSE GENERATOR
21.5 Operations
21.5.4.1

At OPDBRH0 and OPDBRL0 Write

The timing change of the output pin OPTx, which is triggered by OPDBRH0 and
OPDBRL0 write, is shown in Figure 21.5-13.
■ Timing Generated by OPDBRH0 and OPDBRL0 Write (OPS[2:0] = 0b000)
Note:
Word access to the output data buffer register 0 must be used in this operation, byte
access to either lower register or upper register does not start any transfer operation. The
reload timer is free to be used in this operation mode.
Figure 21.5-13 Timing Generated by OPDBRH0 and OPDBRL0 Write (OPS[2:0] = 0b000)
RDA[2:0]
0b000
(OPDUR)
ODBR0W
ODBR1W
ODBR2W
WTO
OP0[1:0]
0b00
(OPDLR)
PPG
OPT0
404
0b110
0b01
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
0b001
0b11
MN702-00009-1v0-E

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