Table of Contents
Advertisement
MB95630H Series
■ Features of Dual Operation Flash Memory
•
Sector configuration
- 8 Kbyte × 8 bits (4 Kbyte + 2 Kbyte × 2)
- 12 Kbyte × 8 bits (8 Kbyte + 2 Kbyte × 2)
- 20 Kbyte × 8 bits (16 Kbyte + 2 Kbyte × 2)
- 36 Kbyte × 8 bits (32 Kbyte + 2 Kbyte × 2)
•
Two-bank configuration, enabling simultaneous execution of a program/erase operation and
a read operation
•
Automatic algorithm (Embedded Algorithm)
•
Erase-suspend/erase-resume functions integrated
•
Detecting the completion of programming/erasing using the data polling flag or the toggle
bit
•
Detecting the completion of programming/erasing by CPU interrupts
•
Capable of erasing data in specific sectors (any combination of sectors)
•
Compatible with JEDEC standard commands
•
Number of program/erase cycles (minimum): 100000
•
Flash read cycle time (minimum): 1 machine cycle
■ Programming and Erasing Flash Memory
•
Programming data to and reading data from the same bank of the Flash memory cannot be
executed simultaneously.
•
To program data to or erase data from a bank in the Flash memory, copy the program for
programming/erasing either to another bank or to the RAM first, and then execute the
program.
•
The dual operation Flash memory enables programming in the Flash memory and
controlling programming by using interrupts. In addition, it is not necessary to download a
program to RAM in order to program data to a bank, thereby reducing the time of program
download and eliminating the need to protecting RAM data against power interruption.
MN702-00009-1v0-E
CHAPTER 25 DUAL OPERATION FLASH MEMORY
FUJITSU SEMICONDUCTOR LIMITED
25.1 Overview
533
Advertisement
Table of Contents
