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MB95630H Series
8.2
Configuration
The watchdog timer consists of the following blocks:
• Count clock selector
• Watchdog timer counter
• Reset control circuit
• Watchdog timer clear selector
• Counter clear control circuit
• Watchdog timer control register (WDTC)
■ Block Diagram of Watchdog Timer
21
20
20
2
/F
(or 2
/F
or 2
CH
CRH
20
19
19
2
/F
(or 2
/F
or 2
CH
CRH
(Time-base timer output)
14
2
/F
(or 2
CL
13
2
/F
(or 2
CL
(Watch prescaler output)
(Sub-CR timer)
Clear signal from
time-base timer
Clear signal from
watch prescaler
Sleep mode starts
Stop mode starts
Time-base timer/watch mode starts
Stopping or running in stop mode
F
: Main clock
CH
F
: Main CR clock
CRH
F
: Main CR PLL clock
MCRPLL
F
: Subclock
CL
F
: Sub-CR clock
CRL
MN702-00009-1v0-E
CHAPTER 8 HARDWARE/SOFTWARE WATCHDOG TIMER
Figure 8.2-1 Block Diagram of Watchdog Timer
Watchdog timer control register (WDTC)
CS1
CS0 CSP
/F
),
MCRPLL
/F
)
MCRPLL
13
/F
),
CRL
Count clock
12
/F
)
CRL
selector
16
2
/F
CRL
Watchdog timer
clear selector
FUJITSU SEMICONDUCTOR LIMITED
WTE3 WTE2
WTE1
WTE0
HWWDT
Watchdog timer
Clear
Watchdog
timer counter
Counter clear
control circuit
8.2 Configuration
Activate
Reset
control
circuit
Overflow
Reset
signal
101
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