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CHAPTER 8 HARDWARE/SOFTWARE WATCHDOG TIMER
8.2 Configuration
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Count clock selector
This selector selects the count clock of the watchdog timer counter.
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Watchdog timer counter
This is a 1-bit counter that uses the output of the time-base timer or of the watch prescaler or of
the sub-CR timer as the count clock.
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Reset control circuit
This circuit generates a reset signal when the watchdog timer counter overflows.
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Watchdog timer clear selector
This selector selects the watchdog timer clear signal.
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Counter clear control circuit
This circuit controls the clearing and stopping of the watchdog timer counter.
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Watchdog timer control register (WDTC)
This register performs setup for activating/clearing the watchdog timer counter as well as for
selecting the count clock.
■ Input Clock
The watchdog timer uses the output clock of the time-base timer or of the watch prescaler or of
the sub-CR timer as the input clock (count clock).
102
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
MN702-00009-1v0-E
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