Operation Of Interval Timer Function (Free-Run Mode) - Fujitsu MB95630H Series Hardware Manual

CHAPTER 11 8/16-BIT COMPOSITE TIMER
11.8 Operation of Interval Timer Function
(Free-run Mode)
11.8 Operation of Interval Timer Function (Free-run
Mode)
This section describes the operation of the interval timer function (free-run
mode) of the 8/16-bit composite timer.

■ Operation of Interval Timer Function (Free-run Mode)

The settings shown in Figure 11.8-1 are required to use the interval timer function (free-run
mode).
Figure 11.8-1 Settings for Interval Timer Function (Free-run Mode)
Tn0CR0/Tn1CR0
Tn0CR1/Tn1CR1
TMCRn
Tn0DR/Tn1DR
As for the interval timer function (free-run mode), enabling timer operation (Tn0CR1/
Tn1CR1:STA = 1) causes the counter to start counting from "0x00" at the rising edge of a
selected count clock signal. When the counter value matches the value in the 8/16-bit
composite timer data register (Tn0DR/Tn1DR), the timer output bit (TMCRn:TO0/TO1) is
inverted and the interrupt flag (Tn0CR1/Tn1CR1:IF) is set to "1". If the counter continues to
count with the above settings and then reaches "0xFF", it returns to "0x00" and restarts
counting. The timer outputs square wave as a result of this continuous operation.
The value of the 8/16-bit composite timer data register (Tn0DR/Tn1DR) is transferred to the
temporary storage latch (comparison data storage latch) in the comparator either when the
counter starts counting or when a counter value comparison match is detected. Do not write
"0x00" to the 8/16-bit composite timer data register.
When the timer stops operation, the timer output bit (TMCRn:TO0/TO1) holds the last value.
148
bit7 bit6 bit5
IFE C2 C1
❍ ❍ ❍
STA HO IE
❍ ❍
1
TO1 TO0 TIS
❍ ❍
×
Sets interval time (counter compare value)
❍: Bit to be used
×: Unused bit
1: Set to "1"
0: Set to "0"
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
bit4 bit3 bit2
C0 F3 F2
❍
0 0
IR BF IF
❍
× ×
MOD FE11 FE10
❍ ❍ ❍
bit1 bit0
F1 F0
1 0
SO OE
❍ ❍
FE01 FE00
❍ ❍
MN702-00009-1v0-E