Table of Contents
Advertisement
CHAPTER 20 16-BIT RELOAD TIMER
20.5 Interrupt
20.5
Interrupt
The 16-bit reload timer outputs an interrupt request when an underflow occurs
on the 16-bit downcounter.
■ Interrupt of 16-bit Reload Timer
Table 20.5-1 shows the interrupt control bit and interrupt source of the 16-bit reload timer.
Table 20.5-1 Interrupt Control Bits and Interrupt Sources of 16-bit Reload Timer
Interrupt request flag bit
Interrupt request enable bit
Interrupt source
The 16-bit reload timer sets the underflow interrupt request flag bit (UF) in the 16-bit reload
timer control status register lower (TMCSRLn) to "1" when an underflow occurs in the 16-bit
downcounter ("0x0000" → "0xFFFF"). If the underflow interrupt request has been enabled
(TMCSRLn:INTE = 1), the interrupt request will be output to the interrupt controller.
360
Item
UF bit in TMCSRLn register
INTE bit in TMCSRLn register
Underflow of downcounter (TMRHn/TMRLn)
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
Description
MN702-00009-1v0-E
Advertisement
Table of Contents
